System on Chip Based RTC in Power Electronics
| Autor: | T. Sasilatha, R. Dorothy |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
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Control and Optimization Computer Networks and Communications Computer science Multiprocessing 02 engineering and technology computer.software_genre 030507 speech-language pathology & audiology 03 medical and health sciences multiprocessing 0202 electrical engineering electronic engineering information engineering Computer Science (miscellaneous) System on a chip Electrical and Electronic Engineering Field-programmable gate array Instrumentation Emulation business.industry Firmware Asymmetric multiprocessing Microcontroller Hardware and Architecture Control and Systems Engineering Control system Embedded system 020201 artificial intelligence & image processing SoC 0305 other medical science business computer control Information Systems |
| Popis: | Current control systems and emulation systems (Hardware-in-the-Loop, HIL or Processor-in-theLoop, PIL) for high-end power-electronic applications often consist of numerous components and interlinking busses: a micro controller for communication and high level control, a DSP for real-time control, an FPGA section for fast parallel actions and data acquisition, multiport RAM structures or bus systems as interconnecting structure. System-on-Chip (SoC) combines many of these functions on a single die. This gives the advantage of space reduction combined with cost reduction and very fast internal communication. Such systems become very relevant for research and also for industrial applications. The SoC used here as an example combines a Dual-Core ARM 9 hard processor system (HPS) and an FPGA, including fast interlinks between these components. SoC systems require careful software and firmware concepts to provide real-time control and emulation capability. This paper demonstrates an optimal way to use the resources of the SoC and discusses challenges caused by the internal structure of SoC. The key idea is to use asymmetric multiprocessing: One core uses a bare-metal operating system for hard real time. The other core runs a “real-time” Linux for service functions and communication. The FPGA is used for flexible process-oriented interfaces (A/D, D/A, switching signals), quasi-hard-wired protection and the precise timing of the real-time control cycle. This way of implementation is generally known and sometimes even suggested–but to the knowledge of the author’s seldomly implemented and documented in the context of demanding real-time control or emulation. The paper details the way of implementation, including process interfaces, and discusses the advantages and disadvantages of the chosen concept. Measurement results demonstrate the properties of the solution. |
| Databáze: | OpenAIRE |
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