Design of a full 1Mb STT-MRAM based on advanced FDSOI technology
| Autor: | Guillaume Prenat, Kotb Jabeur |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Engineering Magnetoresistive random-access memory Hardware_MEMORYSTRUCTURES business.industry 020208 electrical & electronic engineering Spin-transfer torque 02 engineering and technology Leakage power Integrated circuit 01 natural sciences Power (physics) law.invention CMOS law lcsh:TA1-2040 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electronic engineering New device business lcsh:Engineering (General). Civil engineering (General) Random access |
| Zdroj: | MATEC Web of Conferences, Vol 125, p 01003 (2017) |
| Popis: | In one hand, the shrinking of CMOS technology nodes is dramatically increasing the leakage current in integrated circuits. In the other hand, modern portable devices first concern is power-efficiency to insure a better autonomy. Thus, new device technologies and computing strategies are required in integrated systems to save power without limiting processing performances. The use of Non-Volatile Memories (NVM) seems to be a choice of a great interest in complex computing systems. But, their integration within heterogeneous technologies remains a real challenge. Among emerging NV memories, Spin Transfer Torque Magnetic Random Access Memories (STT-MRAM) is considered as one of the most attractive candidates to overcome shortcomings of conventional memories. In this paper, we describe the design of a fully embedded STT-MRAM. We developed and validated a complete MRAM platform to simulate and evaluate a 1Mb STT-MRAM based on 28nm FDSOI technology. Furthermore, we exploited body back biasing techniques offered by the FDSOI technology to achieve 60% of decrease in term of leakage power and give the possibility to increase performance up to 2x. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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