Modem gain-cell memories in advanced technologies
| Autor: | Esteve Amat, Ramon Canal, Antonio Rubio |
|---|---|
| Přispěvatelé: | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya. VIRTUOS - Virtualisation and Operating Systems, Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
| Jazyk: | angličtina |
| Rok vydání: | 2018 |
| Předmět: |
Computer science
Non destructive Systems analysis 02 engineering and technology Static random access storage eDRAM Advanced technology Gain-cells Circuits integrats -- Fiabilitat Memory cell Robustness (computer science) 0202 electrical engineering electronic engineering information engineering Static random-access memory Hardware_MEMORYSTRUCTURES business.industry Subthreshold conduction Dynamic random access storage Subthreshold 020208 electrical & electronic engineering Dram capacitor Electrical engineering Enginyeria electrònica::Microelectrònica::Circuits integrats [Àrees temàtiques de la UPC] SRAM Gain cell DRAM Reliability problems FinFET Read operation business Integrated circuits -- Reliability Dram |
| Zdroj: | UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) Recercat. Dipósit de la Recerca de Catalunya instname IOLTS |
| Popis: | With the advent of the slowdown in DRAM capacitor scaling [1] and the increased reliability problems of traditional 6T SRAM memories [2], industry and academia have looked for alternative memory cells. Among those, gain- cells have attracted significant attention due to their smaller size (compared to SRAM) and non-destructive read operation (compared to DRAM) as well as considerable low power and reasonable robustness. This paper first summarizes the available evidences of SRAM and eDRAM in commercial and test chips. Then, it analyzes the performance, reliability and scaling of eDRAM gain-cells in 10 and 7 nm FinFET technology; as well as above and below $\mathrm {V}_{\mathrm {T}}$ (i.e. sub-threshold). |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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