An Integrator and Schmitt Trigger Based Voltage-to-Frequency Converter Using Unipolar Metal-Oxide Thin Film Transistors
| Autor: | Zhaohui Wu, Sunbin Deng, Fan Houbo, Lei Lu, Fion Sze Yan Yeung, Bin Li, Hoi Sing Kwok, Rongsheng Chen, Wei Zhong, Yuming Xu |
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| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: |
Materials science
Schmitt trigger 02 engineering and technology 01 natural sciences law.invention law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering voltage-to-frequency converter Sensitivity (control systems) Electrical and Electronic Engineering Circuit complexity 010302 applied physics business.industry 020208 electrical & electronic engineering Transistor Thin film transistors Electronic Optical and Magnetic Materials Threshold voltage Thin-film transistor Integrator amplifier Optoelectronics lcsh:Electrical engineering. Electronics. Nuclear engineering business lcsh:TK1-9971 Biotechnology Voltage |
| Zdroj: | IEEE Journal of the Electron Devices Society, Vol 9, Pp 144-150 (2021) |
| ISSN: | 2168-6734 |
| Popis: | This article proposes a voltage-to-frequency converter (VFC) design using unipolar metal-oxide thin film transistor (TFT) technology. The proposed VFC has an integrator and Schmitt trigger based structure. This structure has the advantages of constant power consumption, full-swing output, and low circuit complexity compared to the early designs. To verify the proposed design, SmartSpice simulation based on a Rensselaer Polytechnic Institute (RPI) model whose parameters are turned to fix the measured characteristics of our indium tin oxide- (ITO-) stabilized ZnO TFTs is carried out. The ITO-stabilized ZnO TFT has a single-gate staggered structure. Its typical field-effect mobility, threshold voltage, on/off current ratio, and subthreshold-slope are 14.5 cm2/Vs, 0.5 V, $1.2{\mathrm {\times }} 10^{8}$ , and 77 mV/decade, respectively. Simulation results show that the proposed VFC has maximum linearity error less than 1.8%, tuning sensitivity about 1 kHz/V, and power consumption less than $130~{\mu }\text{W}$ even under device variations. These performances are competitive compared to the state-of-the-arts. When configured to an analog-to-digital converter (ADC), 6 bit resolution and 14 S/s sampling rate can be realized. These results indicate that the VFC can find potential applications in flexible large-area low-voltage sensor interfaces for quasi-static signals. |
| Databáze: | OpenAIRE |
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