Studies on the energy and deep memory behaviour of a cache-oblivious, task-based hyperbolic PDE solver
| Autor: | Dominic Etienne Charrier, Ekaterina O. Tutlyaeva, Tobias Weinzierl, Michael Bader, Andrey Kudryavtsev, Alexander Moskovsky, Benjamin Hazelwood, Michael Dumbser |
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| Rok vydání: | 2019 |
| Předmět: |
FOS: Computer and information sciences
Computer science 010103 numerical & computational mathematics 02 engineering and technology Parallel computing Thread (computing) Cache-oblivious algorithm Intel Optane technology 01 natural sciences Theoretical Computer Science hyperbolic 0202 electrical engineering electronic engineering information engineering 0101 mathematics Latency (engineering) 020203 distributed computing Hardware_MEMORYSTRUCTURES Solver cache behaviour Supercomputer Adaptive mesh refinement ddc Adaptive mesh refinement hyperbolic Intel Optane technology energy cache behaviour Hardware and Architecture Computer Science - Mathematical Software Cache Mathematical Software (cs.MS) Software energy |
| Zdroj: | The International Journal of High Performance Computing Applications International journal of high performance computing applications, 2019, Vol.33(5), pp.973-986 [Peer Reviewed Journal] |
| ISSN: | 1094-3420 |
| DOI: | 10.1177/1094342019842645 |
| Popis: | We study the performance behaviour of a seismic simulation using the ExaHyPE engine with a specific focus on memory characteristics and energy needs. ExaHyPE combines dynamically adaptive mesh refinement (AMR) with ADER-DG. It is parallelized using tasks, and it is cache efficient. AMR plus ADER-DG yields a task graph which is highly dynamic in nature and comprises both arithmetically expensive tasks and tasks which challenge the memory’s latency. The expensive tasks and thus the whole code benefit from AVX vectorization, although we suffer from memory access bursts. A frequency reduction of the chip improves the code’s energy-to-solution. Yet, it does not mitigate burst effects. The bursts’ latency penalty becomes worse once we add Intel Optane technology, increase the core count significantly or make individual, computationally heavy tasks fall out of close caches. Thread overbooking to hide away these latency penalties becomes contra-productive with noninclusive caches as it destroys the cache and vectorization character. In cases where memory-intense and computationally expensive tasks overlap, ExaHyPE’s cache-oblivious implementation nevertheless can exploit deep, noninclusive, heterogeneous memory effectively, as main memory misses arise infrequently and slow down only few cores. We thus propose that upcoming supercomputing simulation codes with dynamic, inhomogeneous task graphs are actively supported by thread runtimes in intermixing tasks of different compute character, and we propose that future hardware actively allows codes to downclock the cores running particular task types. |
| Databáze: | OpenAIRE |
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