Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors
Autor: | Nigel D. Young, Radu A. Sporea, S. R. P. Silva, John M. Shannon, Michael J. Trainor |
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Rok vydání: | 2012 |
Předmět: | |
Zdroj: | IEEE Transactions on Electron Devices. 59:2180-2186 |
ISSN: | 1557-9646 0018-9383 |
DOI: | 10.1109/ted.2012.2198823 |
Popis: | Source-gated transistors (SGTs) have potentially very high output impedance and low saturation voltages, which make them ideal as building blocks for high-performance analog circuits fabricated in thin-film technologies. The quality of saturation is greatly influenced by the design of the field-relief structure incorporated into the source electrode. Starting from measurements on self-aligned polysilicon structures, we show through numerical simulations how the field plate (FP) design can be improved. A simple source FP around 1 μm long situated several tens of nanometers above the semiconductor can increase the low-voltage intrinsic gain by more than two orders of magnitude and offers adequate tolerance to process variations in a moderately scaled thin-film SGT. © 2012 IEEE. |
Databáze: | OpenAIRE |
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