Cost-Effective and Flexible Asynchronous Interconnect Technology for GALS Systems
| Autor: | Steven M. Nowick, Kshitij Bhardwaj, Alberto Ghiribaldi, Davide Bertozzi, Weiwei Jiang, Greg Sadowski, Wayne Burleson, Gabriele Miorandi |
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| Rok vydání: | 2021 |
| Předmět: |
low power
Computer science asynchronous networks-on-chip 02 engineering and technology Network topology on-chip interconnection network NO 020202 computer hardware & architecture Power (physics) Asynchrony (computer programming) asynchronous design Computer architecture Hardware and Architecture Asynchronous communication 0202 electrical engineering electronic engineering information engineering GALS CAD tool flow Electrical and Electronic Engineering Software GALS on-chip interconnection network asynchronous networks-on-chip asynchronous design CAD tool flow bundled data low power bundled data |
| Zdroj: | IEEE Micro. 41:69-81 |
| ISSN: | 1937-4143 0272-1732 |
| Popis: | In this article, a novel interconnect technology is presented for the cost-effective and flexible design of asynchronous networks-on-chip. It delivers asynchrony in heterogeneous system integration while yielding low-energy on-chip data movement. The approach consists of both a lightweight asynchronous switch architecture (using transition-signaling protocols and bundled-data encoding) and a complete synthesis flow built on top of mainstream industrial CAD tools. For the first time, this article demonstrates compelling area, performance and power benefits when compared to a recent commercial synchronous switch, and the ability of the tool flow to correctly instantiate a complete and competitive network topology. |
| Databáze: | OpenAIRE |
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