Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications
| Autor: | Xiang Li, She-Mein Wong, Y. H. Yu, Navab Singh, Yuan Sun, Dim-Lee Kwong, Kavitha Devi Buddharaju, G. Q. Lo, Yisuo Li, Nansheng Shen, G. Ramanathan, S. J. Lee, Zuying Chen |
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| Přispěvatelé: | School of Electrical and Electronic Engineering |
| Rok vydání: | 2012 |
| Předmět: |
Materials science
Transistor Nanowire Nanotechnology Engineering physics law.invention Non-volatile memory CMOS law Low-power electronics lcsh:Technology (General) Engineering::Electrical and electronic engineering [DRNTU] Hardware_INTEGRATEDCIRCUITS lcsh:T1-995 General Materials Science Node (circuits) Electronics Hardware_LOGICDESIGN Electronic circuit |
| Zdroj: | Journal of Nanotechnology, Vol 2012 (2012) |
| ISSN: | 1687-9511 1687-9503 |
| DOI: | 10.1155/2012/492121 |
| Popis: | This paper reviews the progress of the vertical top-down nanowire technology platform developed to explore novel device architectures and integration schemes for green electronics and clean energy applications. Under electronics domain, besides having ultimate scaling potential, the vertical wire offers (1) CMOS circuits with much smaller foot print as compared to planar transistor at the same technology node, (2) a natural platform for tunneling FETs, and (3) a route to fabricate stacked nonvolatile memory cells. Under clean energy harvesting area, vertical wires could provide (1) cost reduction in photovoltaic energy conversion through enhanced light trapping and (2) a fully CMOS compatible thermoelectric engine converting waste-heat into electricity. In addition to progress review, we discuss the challenges and future prospects with vertical nanowires platform. Published version |
| Databáze: | OpenAIRE |
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