An area efficient high turn ratio monolithic transformer for silicon RFIC
| Autor: | Qiu-ping, Chirn Chye Boon, Manh Anh Do, Chee Chong Lim, Kok Wai Chew, Lap Chan, Kiat Seng Yeo, Suh Fei Lim |
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| Přispěvatelé: | School of Electrical and Electronic Engineering, IEEE Radio Frequency Integrated Circuits Symposium (2008 : Atlanta, Georgia, US), Chartered Semiconductor Manufacturing Ltd |
| Rok vydání: | 2008 |
| Předmět: |
Engineering
business.industry Flyback transformer Electrical engineering Choke Distribution transformer Engineering::Electrical and electronic engineering::Integrated circuits [DRNTU] law.invention Inductance law Electromagnetic coil Hardware_INTEGRATEDCIRCUITS RFIC Energy efficient transformer business Transformer |
| Zdroj: | 2008 IEEE Radio Frequency Integrated Circuits Symposium. |
| Popis: | A novel way of manufacturing an on-chip transformer that produces high inductance ratio (LSec/LPri > 30) with excellent area efficiency is presented. This technique uses an electrical all-round coupling effect of a conductor A (Primary Coil), having large effective width, and a densely routed conductor B (Secondary Coil). Thus, a high turn ratio monolithic transformer, using minimum die size, is realizable on silicon. The coil having the dense routing can also be doubled up as a monolithic RF choke on silicon. In this work, area efficiency is compared between various type of existing transformer structures (i.e. Interleaved and Stacked transformer), based on unit inductance. The method presented is fully compatible to all the foundry standard CMOS processes. Published version |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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