TERAFLUX: Harnessing dataflow in next generation teradevices
| Autor: | Giorgi, Roberto, Badia, R. M., Bodin, F., Cohen, A., Evripidou, Paraskevas, Faraboschi, P., Fechner, B., Gao, G. R., Garbade, A., Gayatri, R., Girbal, S., Goodman, D., Khan, B., Koliaï, S., Landwehr, J., Lê, N. M., Li, F., Lujàn, M., Mendelson, A., Morin, L., Navarro, N., Patejko, T., Pop, A., Trancoso, Pedro, Ungerer, T., Watson, I., Weis, S., Zuckerman, S., Valero, M. |
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| Přispěvatelé: | Dipartimento di Ingegneria dell'informazione e scienze matematiche [Siena] (DIISM), Università degli Studi di Siena = University of Siena (UNISI), Barcelona Supercomputing Center - Centro Nacional de Supercomputacion (BSC - CNS), CAPS entreprise [Rennes], CAPS Entreprise, Parallélisme de Kahn Synchrone (Parkas ), Département d'informatique - ENS Paris (DI-ENS), École normale supérieure - Paris (ENS-PSL), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-École normale supérieure - Paris (ENS-PSL), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-Inria Paris-Rocquencourt, Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS), Computer Science Department [Cyprus], University of Cyprus [Nicosia] (UCY), Intelligent Infrastructure Lab. [Barcelona], Hewlett-Packard, University of Augsburg (UNIA), University of Delaware [Newark], THALES [France], University of Manchester [Manchester], Technion - Israel Institute of Technology [Haifa], Trancoso, Pedro [0000-0002-2776-9253], Evripidou, Paraskevas [0000-0002-2335-9505], Centre National de la Recherche Scientifique (CNRS)-Inria Paris-Rocquencourt, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-Département d'informatique de l'École normale supérieure (DI-ENS), École normale supérieure - Paris (ENS Paris), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-École normale supérieure - Paris (ENS Paris), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Centre National de la Recherche Scientifique (CNRS), University of Cyprus [Nicosia], University of Augsburg [Augsburg], Thales (France), Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Paris (ENS Paris), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Paris (ENS Paris), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Inria Paris-Rocquencourt |
| Jazyk: | angličtina |
| Rok vydání: | 2014 |
| Předmět: |
Multi-cores
Computer Networks and Communications Computer science Dataflow Reliability (computer networking) 02 engineering and technology Multicore programming 01 natural sciences Porting Artificial Intelligence Exascale computing 0103 physical sciences Architecture 0202 electrical engineering electronic engineering information engineering media_common.cataloged_instance [INFO]Computer Science [cs] European union media_common 010302 applied physics Semiconductor device manufacture Programming models Many-cores Computer simulation Compilation Reliability 020202 computer hardware & architecture Computer architecture Programming model Hardware and Architecture Programming paradigm Software Simulation Data flow analysis |
| Zdroj: | Microprocessors and Microsystems: Embedded Hardware Design Microprocessors and Microsystems: Embedded Hardware Design, 2014, 38 (8), pp. 976-990. ⟨10.1016/j.micpro.2014.04.001⟩ Microprocessors and Microsystems Microprocessors Microsyst Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2014, 38 (8), pp. 976-990. ⟨10.1016/j.micpro.2014.04.001⟩ |
| ISSN: | 0141-9331 1872-9436 |
| Popis: | The improvements in semiconductor technologies are gradually enabling extreme-scale systems such as teradevices (i.e., chips composed by 1000 billion of transistors), most likely by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper presents an overview of the research carried out by the TERAFLUX partners and some preliminary results. Our platform comprises 1000+ general purpose cores per chip in order to properly explore the above challenges. An architectural template has been proposed and applications have been ported to the platform. Programming models, compilation tools, and reliability techniques have been developed. The evaluation is carried out by leveraging on modifications of the HP-Labs COTSon simulator. © 2014 Elsevier B.V. All rights reserved. 38 8 976 990 Cited By :37 |
| Databáze: | OpenAIRE |
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