FPGA Implementation of Elliptic Curve Cryptoprocessor for Perceptual Layer of the Internet of Things
| Autor: | S. Tamilselvan, V. Kamalakannan |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2018 |
| Předmět: |
Computer science
business.industry lcsh:T media_common.quotation_subject 05 social sciences Internet of Things 050301 education 02 engineering and technology lcsh:Technology 020202 computer hardware & architecture Elliptic curve Secure cryptoprocessor Perception Elliptic Curve Digital Signature Algorithm 0202 electrical engineering electronic engineering information engineering Layer (object-oriented design) Arithmetic Perceptual layer Field-programmable gate array business 0503 education Wireless Sensor Network Elliptical Curve Cryptography media_common |
| Zdroj: | EAI Endorsed Transactions on Security and Safety, Vol 5, Iss 15 (2018) |
| ISSN: | 2032-9393 |
| Popis: | Today’s developing era data and information security plays an important role in unsecured communication between Internet of Things (IoT) elements. In IoT, data are transmitted in plaintext for many reasons. One of the most common reason is the availability of hardware. Many IoT products are inexpensive components with limited memory and computational resources. Such devices might be unable to support the computationally intense cryptographic functions of asymmetrical cryptography. If designers considered the privacy implications of unencrypted data, they have limited options for encryption because of the hardware platform. Therefore the designers have to create their own security protocols or implement stripped-down versions of existing security protocols. The second option has a better chances. Evidence recommends such a modified protocol would run efficiently on small devices. Elliptic Curve Cryptography (ECC) is used to ensure complete protection against the security risks such as confidentiality, integrity, privacy and authentication by implementing an Elliptic Curve Cryptoprocessor. The work focuses on high-performance Elliptic Curve Cryptoprocessor design, optimized for Field Programmable Gate Array (FPGA) implementation, using the concept of asymmetric and hash algorithms. A novel cryptographic algorithm consisting of matrix mapping methodology and hidden generator point theory is to be applied for encryption/decryption between the sender and receiver whereas Elliptic Curve Digital Signature Algorithm (ECDSA) designed using Keccak Secured Hash Algorithm (SHA) algorithm is applied for the validation of the encrypted data. The proposed Cryptoprocessor operates at a minimum period of 6.980 ns and maximum frequency of 143.276 MHz. This work focuses on the practicability of public key cryptography implementation for devices connected in the perceptual layer of IoT. |
| Databáze: | OpenAIRE |
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