An on-chip 96.5% current efficiency CMOS linear regulator

Autor:	Tetsuo Endoh, Kazuhisa Sunaga, Hiroshi Sakuraba, Fujio Masuoka
Rok vydání:	2002
Předmět:	Engineering Low-dropout regulator CMOS business.industry Dropout voltage Spice Linear regulator Electronic engineering Voltage regulator business Pulse-width modulation Voltage
Zdroj:	ASP-DAC
Popis:	A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 /spl mu/m CMOS process occupies 0.423 mm/sup 2/. The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6f701c6d15c20a8e9c93c907fc859c63 https://doi.org/10.1109/aspdac.2001.913322 Zobrazit plný text záznamu