An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates
| Autor: | Sakthivel Palaniappan, T. Kalavathi Devi |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2015 |
| Předmět: |
Very-large-scale integration
Article Subject lcsh:T business.industry Computer science lcsh:R Asynchronous array of simple processors Real-time computing lcsh:Medicine General Medicine Asynchronous method invocation lcsh:Technology General Biochemistry Genetics and Molecular Biology Viterbi decoder Asynchronous communication Convolutional code lcsh:Q Forward error correction lcsh:Science business Computer hardware Decoding methods Research Article General Environmental Science |
| Zdroj: | The Scientific World Journal The Scientific World Journal, Vol 2015 (2015) |
| ISSN: | 2356-6140 |
| DOI: | 10.1155/2015/621012 |
| Popis: | Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present, the design of a competent system in Very Large Scale Integration (VLSI) technology requires these VLSI parameters to be finely defined. The proposed asynchronous method focuses on reducing the power consumption of Viterbi decoder for various constraint lengths using asynchronous modules. The asynchronous designs are based on commonly used Quasi Delay Insensitive (QDI) templates, namely, Precharge Half Buffer (PCHB) and Weak Conditioned Half Buffer (WCHB). The functionality of the proposed asynchronous design is simulated and verified using Tanner Spice (TSPICE) in 0.25 µm, 65 nm, and 180 nm technologies of Taiwan Semiconductor Manufacture Company (TSMC). The simulation result illustrates that the asynchronous design techniques have 25.21% of power reduction compared to synchronous design and work at a speed of 475 MHz. |
| Databáze: | OpenAIRE |
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