Conduction band offset-dependent induced threshold voltage shifts in a-InGaZnO TFTs under positive bias illumination stress
| Autor: | Jongmin Yoo, Jungmin Park, Soonkon Kim, Pyungho Choi, Bosung Kim, Hyuncheol Hwang, Changyong Oh, Jang-Kun Song, Ki-Ju Im, Hyo-Jung Kim, Byoungdeog Choi |
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| Rok vydání: | 2021 |
| Předmět: |
010302 applied physics
Materials science business.industry Gate dielectric General Physics and Astronomy chemistry.chemical_element 02 engineering and technology Dielectric Photoelectric effect 021001 nanoscience & nanotechnology 01 natural sciences lcsh:QC1-999 Threshold voltage Stress (mechanics) chemistry Thin-film transistor 0103 physical sciences Density of states Optoelectronics Gallium 0210 nano-technology business lcsh:Physics |
| Zdroj: | AIP Advances, Vol 11, Iss 3, Pp 035312-035312-5 (2021) |
| ISSN: | 2158-3226 |
| Popis: | In this paper, the dependence of threshold voltage (Vth) changes to amorphous-indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) under positive bias light illumination (PBIS) on the height of the conduction band offset was studied. Using SiO2, HfO2, and Al2O3 as gate dielectrics, three different types of a-IGZO TFTs were used in the experiment. Electrical parameters and the density of states of each TFT were measured. Of the devices studied, the interface characteristics between the a-IGZO and the gate dielectric were the best using SiO2 and the worst using Al2O3. HfO2 had the smallest conduction band offsets (CBO) of 2.26 eV. We also performed PBS and PBIS evaluation to confirm the stability of TFTs. The Vth shift in the three samples was insignificant under PBS, but the Vth shifts occurred under PBIS in the order of HfO2, Al2O3, and SiO2. The interfacial characteristics of a-IGZO and the dielectric did not change after PBIS in all three devices; the lower the CBO height, the greater the Vth shift after PBIS. The predominant cause of the Vth shift under PBIS is the accumulation of injected photoelectrons that have sufficient energy to tunnel the CBO barrier into the gate dielectric by positive gate bias. |
| Databáze: | OpenAIRE |
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