Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories
| Autor: | Guillaume Prenat, Christophe Layer, Pierre Paoli, Virgile Javerliac, Bernard Dieny, Gregory Di Pendina, Laurent Becker, Loic Decloedt, Kotb Jabeur, Sylvain Claireux, Stéphane Gros, Fabrice Bernard-Granger |
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| Přispěvatelé: | SPINtronique et TEchnologie des Composants (SPINTEC), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), eVaderis |
| Jazyk: | angličtina |
| Rok vydání: | 2016 |
| Předmět: |
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Engineering 02 engineering and technology 0202 electrical engineering electronic engineering information engineering check-pointing interrupt Static random-access memory Electrical and Electronic Engineering Leakage (electronics) Magnetoresistive random-access memory Hardware_MEMORYSTRUCTURES business.industry hybrid CMOS/magnetic STT-MRAM 021001 nanoscience & nanotechnology 020202 computer hardware & architecture CMOS Hardware and Architecture Embedded system Systems architecture Systems design [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET] Interrupt 0210 nano-technology business Software Random access |
| Zdroj: | ACM Journal on Emerging Technologies in Computing Systems ACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2016, 12 (4), pp.1-24. ⟨10.1145/2876507⟩ ACM Journal on Emerging Technologies in Computing Systems, 2016, 12 (4), pp.1-24. ⟨10.1145/2876507⟩ |
| ISSN: | 1550-4832 1550-4840 |
| DOI: | 10.1145/2876507⟩ |
| Popis: | International audience; The most widely used embedded memory technology, SRAM (Static Random Access Memory), is heading towards scaling problems in advanced technology nodes, due to the leakage currents caused by the quantum tunneling effect. As an alternative, STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) technology shows comparable performances in terms of speed and power consumption, and much better ones in terms of density and leakage. Moreover, MRAM brings up new paradigms in system design thanks to its inherent non-volatility, which allows the definition of new instant on/off policies and leakage current optimization. Based on our compact model, we have developed a fully characterized SoC (System on Chip) from the basis cell up to the system architecture in a 40nm LP hybrid CMOS/magnetic process. Through simulations, we have firstly demonstrated that STT-MRAM is a candidate for the memory part of embedded systems and have secondly implemented a check-pointing methodology based on the regular interrupt routines of a processor to enable a fast power on and off functionality. Using a synthetic benchmark developed in high level programming languages intended to be representative of integer system performance, our method shows that having MRAM instead of SRAM in an embedded design brings up important energy savings. The influence of the check-pointing routine on the power consumption is finally evaluated with regards to various shutdown and restart behaviors. |
| Databáze: | OpenAIRE |
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