Vectorizing higher-order masking
| Autor: | Gregoire, B., Papagiannopoulos, K., Schwabe, P., Stoffelen, K., Fan, J. |
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| Přispěvatelé: | Mathematical, Reasoning and Software (MARELLE), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria), Radboud university [Nijmegen], Digital Security Group [Nijmegen], Institute for Computing and Information Sciences [Nijmegen] (ICIS), Radboud university [Nijmegen]-Radboud university [Nijmegen], Fan, J., Radboud University [Nijmegen], Radboud University [Nijmegen]-Radboud University [Nijmegen] |
| Rok vydání: | 2018 |
| Předmět: |
060201 languages & linguistics
Multiplication algorithm AES business.industry Computer science Lecture notes in computer science side-channel analysis 06 humanities and the arts 02 engineering and technology Higher-order masking ARM architecture [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR] Software Computer engineering Test vector Bounded function 0602 languages and literature 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing [INFO]Computer Science [cs] ARM Cortex-A8 Digital Security business Implementation Leakage (electronics) |
| Zdroj: | Lecture notes in computer science ; 10815, 23-43. Cham : Springer STARTPAGE=23;ENDPAGE=43;TITLE=Lecture notes in computer science ; 10815 COSADE 2018-Constructive Side-Channel Analysis and Secure Design-9th International Workshop. COSADE 2018-Constructive Side-Channel Analysis and Secure Design-9th International Workshop., Apr 2018, Singapore, Singapore. pp.23-43 Fan, J. (ed.), Constructive Side-Channel Analysis and Secure Design: 9th International Workshop, COSADE 2018, Singapore, April 23–24, 2018, Proceedings, pp. 23-43 Constructive Side-Channel Analysis and Secure Design ISBN: 9783319896403 COSADE |
| Popis: | International audience; The cost of higher-order masking as a countermeasure against side-channel attacks is often considered too high for practical scenarios, as protected implementations become very slow. At Eurocrypt 2017, the bounded moment leakage model was proposed to study the (theoretical) security of parallel implementations of masking schemes [5]. Work at CHES 2017 then brought this to practice by considering an implementation of AES with 32 shares [26], bitsliced inside 32-bit registers of ARM Cortex-M processors. In this paper we show how the NEON vector instructions of larger ARM Cortex-A processors can be exploited to build much faster masked implementations of AES. Specifically, we present AES with 4 and 8 shares, which in theory provide security against 3rd and 7th-order attacks, respectively. The software is publicly available and optimized for the ARM Cortex-A8. We use refreshing and multiplication algorithms that are proven to be secure in the bounded moment leakage model and to be strongly non-interfering. Additionally, we perform a concrete side-channel evaluation on a BeagleBone Black, using a combination of test vector leakage assessment (TVLA), leakage certification tools and information-theoretic bounds. |
| Databáze: | OpenAIRE |
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