Design and Analysis of Secure Quasi-Adiabatic Tristate Physical Unclonable Function
| Autor: | S. Hemavathy, V S Kanchana Bhaaskaran |
|---|---|
| Rok vydání: | 2022 |
| Předmět: |
Hardware security module
Computer science Transistor Physical unclonable function Energy consumption Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Computer Science Applications law.invention PMOS logic Design for manufacturability Human-Computer Interaction ComputingMilieux_MANAGEMENTOFCOMPUTINGANDINFORMATIONSYSTEMS Reliability (semiconductor) Hardware and Architecture law Hardware_INTEGRATEDCIRCUITS Electronic engineering Static random-access memory Electrical and Electronic Engineering |
| Zdroj: | iSES |
| ISSN: | 2162-2256 2162-2248 |
| DOI: | 10.1109/mce.2021.3117541 |
| Popis: | Hardware security modules have become quintessential as the digital systems continue evolving. Physical Unclonable Function (PUF) is a hardware security module that exploits the intrinsic variations in manufacturability of integrated circuits. Proposed Quasi-adiabatic Tristate PUF is a weak PUF which makes use of the inherent mismatches found in the threshold voltage values of PMOS transistors, which inadvertently is introduced due to manufacturing process variations of ICs. The proposed design demonstrates lower energy consumption than those configured using comparable quasi-adiabatic logic counterparts, under varying temperature and peak voltage conditions. The design is compared using SRAM PUF design based on adiabatic logic and it is shown that the proposed one is having better uniqueness and reliability at different environmental conditions. The proposed PUF can generate 128 CRPs which can be well suited for IoT and RFID applications that require less energy to operate. |
| Databáze: | OpenAIRE |
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