HIPStR
| Autor: | Hovav Shacham, Dean M. Tullsen, Sriskanda Shamasunder, Ashish Venkat |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Computer science Code reuse General Medicine 02 engineering and technology Computer Graphics and Computer-Aided Design 01 natural sciences 020202 computer hardware & architecture Instruction set Computer architecture 0103 physical sciences 0202 electrical engineering electronic engineering information engineering General Earth and Planetary Sciences State (computer science) Relocation Return-oriented programming Software General Environmental Science |
| Zdroj: | ASPLOS |
| ISSN: | 0163-5980 |
| DOI: | 10.1145/2954680.2872408 |
| Popis: | Heterogeneous Chip Multiprocessors have been shown to provide significant performance and energy efficiency gains over homogeneous designs. Recent research has expanded the dimensions of heterogeneity to include diverse Instruction Set Architectures, called Heterogeneous-ISA Chip Multiprocessors. This work leverages such an architecture to realize substantial new security benefits, and in particular, to thwart Return-Oriented Programming. This paper proposes a novel security defense called HIPStR -- Heterogeneous-ISA Program State Relocation -- that performs dynamic randomization of run-time program state, both within and across ISAs. This technique outperforms the state-of-the-art just-in-time code reuse (JIT-ROP) defense by an average of 15.6%, while simultaneously providing greater security guarantees against classic return-into-libc, ROP, JOP, brute force, JIT-ROP, and several evasive variants. |
| Databáze: | OpenAIRE |
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