Single-Phase PLL Based on an Adaptive Notch Filter
Autor: | Joan Bergas, Luciano Emilio Belandria |
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Přispěvatelé: | Universitat Politècnica de Catalunya. Departament d'Enginyeria Elèctrica, Universitat Politècnica de Catalunya. CITCEA - Centre d'Innovació Tecnològica en Convertidors Estàtics i Accionaments |
Jazyk: | angličtina |
Rok vydání: | 2020 |
Předmět: |
Computer science
Band-stop filter Orthogonal signal generator orthogonal signal generator Phase-locked loop Electronic engineering Hardware_INTEGRATEDCIRCUITS Convertidors de corrent elèctric Sensitivity (control systems) Electrical and Electronic Engineering single-phase pll MATLAB Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION All-pass filter Digital signal processing computer.programming_language Phase-locked loops Llaços de seguiment de fase Enginyeria elèctrica [Àrees temàtiques de la UPC] business.industry Converters adaptive notch filter Electric current converters all-pass filter Adaptive notch filter TK1-9971 Single-phase PLL Filter (video) phase-locked loop Electrical engineering. Electronics. Nuclear engineering business computer |
Zdroj: | Advances in Electrical and Electronic Engineering, Vol 18, Iss 3, Pp 169-179 (2020) UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) |
ISSN: | 1804-3119 1336-1376 |
Popis: | Single-Phase Phase-Locked Loops (PLL) have become a crucial component of grid-tied power converters. PLL accuracy and fast response are important for control and protection purposes, especially in the presence of voltage harmonics and frequency variations. In this paper, a new PLL structure based on an Adaptive Notch Filter (ANF) is presented. This ANF, which generates the orthogonal system of the PLL, is implemented with an All-Pass Filter (APF) having inherent advantages, such as low sensitivity to coefficient rounding when implemented in fixed-point microprocessors and easy implementation in a Digital Signal Processing (DSP). Both simulation with MATLAB/Simulink, and experimental results on a fixed-point DSP, are presented and analyzed to evaluate the performance of the introduced PLL and to support the theoretical development. A set of comparative simulations between the proposed PLL and a some single-phase PLL described in the literature are conducted to validate the method. |
Databáze: | OpenAIRE |
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