A novel full-wave rectifier/sinusoidal frequency doubler topology based on CFOAs

Autor: Shahram Minaei, Muhammed A. Ibrahim, Erkan Yuce
Přispěvatelé: Doğuş Üniversitesi, Mühendislik Fakültesi, Elektronik ve Haberleşme Mühendisliği Bölümü, TR46127, TR1566, Minaei, Shahram
Jazyk: angličtina
Rok vydání: 2017
Předmět:
Sinusoidal frequency
Engineering
Electric impedance
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
NMOS transistors
Buffer circuits
Topology
law.invention
Matching condition
Frequency doubler
law
Full-wave rectifiers
0202 electrical engineering
electronic engineering
information engineering

NMOS logic
Electronic circuit
Operational amplifiers
SPICE
Current-feedback operational amplifier
Low output and high input impedances
Electrical engineering
Electric rectifiers
Surfaces
Coatings and Films

Feedback amplifiers
Rectifying circuits
Hardware and Architecture
Frequency doublers
Metals
Operational amplifier
Electric network analysis
MOS devices
Frequency multiplier
Electric impedance measurement
Topology (electrical circuits)
High input impedance
Transistors
Precision rectifier
Oxide semiconductors
CFOA
Rectifier
Grounded resistors
Hardware_INTEGRATEDCIRCUITS
Electronic engineering
business.industry
020208 electrical & electronic engineering
Metal oxide semiconductor
020206 networking & telecommunications
Full-wave rectifier
Signal Processing
business
Hardware_LOGICDESIGN
Popis: A novel topology for realizing voltage-mode (VM) full-wave rectifier/sinusoidal frequency doubler based on current feedback operational amplifiers (CFOAs) and n-channel metal-oxide semiconductor (NMOS) transistors is proposed in this study. The proposed full-wave rectifier structure employs two CFOAs and three enhancement-mode NMOS transistors. With a slight modification, the sinusoidal frequency doubler circuit can be adopted from the full-wave rectifier circuit by replacing a grounded resistor instead of one of the NMOS transistors. Both of the proposed circuits enjoy low output and high input impedance properties which make them convenient for cascading easily with other VM circuits without needing any extra buffer circuits. No passive component matching conditions are needed. The proposed circuits are simulated by using SPICE program to verify the theoretical analysis. © 2017, Springer Science+Business Media, LLC.
Databáze: OpenAIRE