Comparative Analysis and Energy-Efficient Write Scheme of Ferroelectric FET-Based Memory Cells
| Autor: | Tae Woo Oh, Seong-Ook Jung, Sehee Lim, Dong Han Ko, Se Keon Kim |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: |
Physics
Control signal swing General Computer Science nonvolatile memory Transistor General Engineering Semiconductor device modeling Energy consumption ferroelectric field-effect transistor write disturbance Topology law.invention Threshold voltage TK1-9971 Non-volatile memory hysteresis law Logic gate ComputingMethodologies_DOCUMENTANDTEXTPROCESSING General Materials Science Electrical engineering. Electronics. Nuclear engineering Electrical and Electronic Engineering Energy (signal processing) Voltage |
| Zdroj: | IEEE Access, Vol 9, Pp 127895-127905 (2021) |
| ISSN: | 2169-3536 |
| Popis: | The ferroelectric field-effect transistor (FeFET) is one of the most promising candidates for emerging nonvolatile memory devices owing to its low write energy and high $I_{\mathrm {ON}}/I_{\mathrm {OFF}}$ ratio. For FeFET applications as nonvolatile memory devices, 1FeFET, 1T-1FeFET, 2T-1FeFET, and 3T-1FeFET cells have been proposed. The 1FeFET cell exhibits the highest density but suffers from write disturbance. Although the 1T-1FeFET and 2T-1FeFET cells resolve the write disturbance, they use a write scheme with a negative write voltage ( $V_{\mathrm {W}}$ ), which requires voltage swings of many control signals, leading to a significantly high write energy consumption. The 3T-1FeFET cell uses a write scheme without a negative $V_{\mathrm {W}}$ ; however, it exhibits the largest area overhead. Although the 1T-1FeFET cell resolves the write disturbance with a small area overhead; however, it exhibits high write energy consumption because of the use of a negative $V_{\mathrm {W}}$ . In this paper, to significantly reduce the write energy consumption, we propose a less control signal swing (LCSS) write scheme without using a negative $V_{\mathrm {W}}$ . Simulation results indicate that the worst, average, and best cases of the proposed LCSS write scheme can achieve 35%, 66%, and 96% lower write energy consumption, respectively, than the write scheme with a negative $V_{\mathrm {W}}$ in the 1T-1FeFET cell. We also identify the available sensing schemes for each FeFET cell in the read operation according to the FeFET threshold voltage distribution. |
| Databáze: | OpenAIRE |
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