FMMU: A Hardware-Accelerated Flash Map Management Unit for Scalable Performance of Flash-Based SSDs
Autor: | Yeong-Jae Woo, Sheayun Lee, Sang Lyul Min |
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Rok vydání: | 2018 |
Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Speedup Computer science business.industry IOPS 02 engineering and technology Linked list 01 natural sciences 020202 computer hardware & architecture Flash (photography) Memory management 0103 physical sciences Scalability 0202 electrical engineering electronic engineering information engineering business Computer hardware |
Zdroj: | DAC |
DOI: | 10.1109/dac.2018.8465808 |
Popis: | Address translation is increasingly a performance bottleneck in flash-based SSDs (solid state drives). We propose a hardware-accelerated flash map management unit called FMMU to speed up the address translation. The FMMU operates in a non-blocking manner without any involvement of software and uses in-cache linked list to enhance the performance of flush operations. Simulation study shows that the FMMU improves IOPS (I/O operations per second) by 135 % on average when compared against software-only approaches. The results also show that the performance gap widens as the number of flash chips/buses and the host interface speed increase. |
Databáze: | OpenAIRE |
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