6 Transistors and 1 Memristor based Memory Cell

Autor:	Kazi Fatima Sharif, Satyendra N. Biswas
Rok vydání:	2020
Předmět:	Computer science Static noise margin Transistor Memory cell nMOS Successive read Memristor SRAM law.invention Noise margin law Electronic engineering System on a chip Static random-access memory Memory model NMOS logic
Zdroj:	International Journal of Reconfigurable and Embedded Systems (IJRES). 9:42
ISSN:	2089-4864
DOI:	10.11591/ijres.v9.i1.pp42-51
Popis:	Area efficient and stable memory design is one of the most important tasks in designing system on chip. This research concentrates in designing a new type of hybrid memory model by using only nMOS transistors and memristor.The proposed memory cell is very stable during successive read operates andcomparatively faster and also occupies less amount of silicon area. Thestability of the data during successive read operation and noise margin are inthe promising range. Extensive simulation results using LTspice andCadence software tools demonstrate the validity and competency of theproposed model.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::529d6880d117b203767b428c40f5df33 https://doi.org/10.11591/ijres.v9.i1.pp42-51 Zobrazit plný text záznamu