Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor
| Autor: | Michael Kirchhoff, Wolfgang Fengler, L. Wagner |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
Floating point
lcsh:Computer engineering. Computer hardware General Computer Science Computer science Optimizing compiler dynamic compiler lcsh:TK7885-7895 computer.software_genre Field (computer science) scheduling algorithms Electrical and Electronic Engineering Field-programmable gate array computer.programming_language Assembly language processor scheduling business.industry Instruction scheduling vector processor Vector processor Embedded system optimization methods Compiler lcsh:Electrical engineering. Electronics. Nuclear engineering business computer lcsh:TK1-9971 |
| Zdroj: | Advances in Electrical and Computer Engineering, Vol 19, Iss 3, Pp 57-68 (2019) |
| ISSN: | 1844-7600 1582-7445 |
| Popis: | This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floating-point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem. |
| Databáze: | OpenAIRE |
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