Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution
| Autor: | Armen Kteyan, Valeriy Sukharev, Alexander Volkov, Jun Ho Choy, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Stephane Moreau |
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| Přispěvatelé: | SIEMENS, Department of Electrical and Computer Engineering [University of Toronto] (ECE), University of Toronto, Department of Electrical and Computer Engineering [Minneapolis] (ECE), University of Minnesota [Twin Cities] (UMN), University of Minnesota System-University of Minnesota System, Département Composants Silicium (DCOS), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA) |
| Rok vydání: | 2023 |
| Předmět: | |
| Zdroj: | ISPD '23: Proceedings of the 2023 International Symposium on Physical Design ISPD'23-International Symposium on Physical Design ISPD'23-International Symposium on Physical Design, Mar 2023, Virtual event USA, United States. pp.124-132 |
| Popis: | International audience; A recently proposed methodology for electromigration (EM) assessment in on-chip power/ground grid of integrated circuits has been validated by means of measurements, performed on dedicated test grids. IR drop degradation in the grid is used for defining the EM failure criteria. Physics-based models are involved for simulation of EM-induced stress evolution in interconnect structures, void formation and evolution, resistance increase of the voided segments, and consequent re-distribution of electric current in the redundant grid paths. A grid-like test structure, fabricated with a 65 nm technology and consisting of two metal layers, allowed to calibrate the voiding models by tracking voltage evolution in all grid nodes in experiment and in simulation. Good fit of the measured and simulated time-to-failure (TTF) probability distribution was obtained in both cases of uniform and non-uniform temperature distribution across the grid. The second test grid was fabricated with a 28 nm technology, consisted of 4 metal layers, and contained power and ground nets connected to quasi-cells with poly-resistors, which were specially designed for operating at elevated temperatures ~350⁰C. The existing current distributions resulted in different behavior of EM-induced failures in these nets: a gradual voltage evolution in power net, and sharp changes in ground net were observed in experiment, and successfully reproduced in simulations. |
| Databáze: | OpenAIRE |
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