Comparison of Different Design Alternatives for Hardware-in-the-Loop of Power Converters
| Autor: | Alberto Sanchez, Marina Yushkova, Elyas Zamiri, María Sofía Martínez-García, Angel de Castro |
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| Přispěvatelé: | UAM. Departamento de Tecnología Electrónica y de las Comunicaciones, Hardware and Control Technology Laboratory |
| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: |
Computer Networks and Communications
Computer science emulation lcsh:TK7800-8360 02 engineering and technology High-level synthesis Power electronics digital circuits VHDL high-level synthesis 0202 electrical engineering electronic engineering information engineering Emulation Electrical and Electronic Engineering Field-programmable gate array MATLAB computer.programming_language field programmable gate arrays Digital electronics Telecomunicaciones business.industry 020208 electrical & electronic engineering lcsh:Electronics Hardware-in-the-loop simulation Field programmable gate arrays Real time systems 020206 networking & telecommunications Digital circuits Converters power electronics Hardware and Architecture Control and Systems Engineering real time systems Embedded system Signal Processing Electrónica business computer |
| Zdroj: | Electronics, Vol 10, Iss 926, p 926 (2021) Biblos-e Archivo. Repositorio Institucional de la UAM instname Electronics Volume 10 Issue 8 |
| ISSN: | 2079-9292 |
| Popis: | This paper aims to compare different design alternatives of hardware-in-the-loop (HIL) for emulating power converters in Field Programmable Gate Arrays (FPGAs). It proposes various numerical formats (fixed and floating-point) and different approaches (pure VHSIC Hardware Description Language (VHDL), Intellectual Properties (IPs), automated MATLAB HDL code, and High-Level Synthesis (HLS)) to design power converters. Although the proposed models are simple power electronics HIL systems, the idea can be extended to any HIL system. This study compares the design effort of different coding methods and numerical formats considering possible synthesis tools (Precision and Vivado), and it comprises an analytical discussion in terms of area and speed. The different models are synthesized as ad-hoc modules in general-purpose FPGAs, but also using the NI myRIO device as an example of a commercial tool capable of implementing HIL models. The comparison confirms that the optimum design alternative must be chosen based on the application (complexity, frequency, etc.) and designers’ constraints, such as available area, coding expertise, and design effort. |
| Databáze: | OpenAIRE |
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