Architecture-driven synthesis techniques for vlsi implementation of dsp algorithms
| Autor: | H. De Man, F. Catthoor, G. Goossens, J. Vanhoof, J.L. Van Meerbergen, S. Note, J.A. Huisken |
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| Předmět: |
Very-large-scale integration
Signal processing Data processing business.industry Computer science Integrated circuit computer.software_genre law.invention Microprocessor Computer architecture law State (computer science) Compiler Electrical and Electronic Engineering business computer Digital signal processing |
| Zdroj: | BASE-Bielefeld Academic Search Engine |
| Popis: | The state of the art of compiling digital signal processing (DSP) algorithms into silicon is discussed. It is indicated how digital signal processing differs from numerical data processing, including the consequences for the synthesis tools. On the basis of a broad range of DSP applications, four classes of architectures are then distinguished to serve as templates for four different synthesis systems. Although each of these four silicon compilers is tuned to a specific class of applications in order to generate area-efficient chips, they all accept as input the same behavioral DSP specification. The four selected architectural styles are best characterized by hard-wired bit-serial data-paths, microcoded multiprocessors, cooperating bit-parallel data-paths, and regular arrays. The characteristics of the first three architectures are treated in more detail in a discussion of three different Cathedral synthesis environments for their respective design. A fourth Cathedral environment, aiming at the synthesis of regular arrays, is still in an early stage of development and is not discussed. The claims for the compilers are substantiated by typical designs. > |
| Databáze: | OpenAIRE |
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