Modelling and simulation of hot-carriers degradation of high voltage floating lateral NDMOS transistors
| Autor: | Marc de Wolf, Catherine De Keukeleire, Johan Hilda Witters, Hugo Van Hove, Eric Vandenbossche |
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| Rok vydání: | 1998 |
| Předmět: |
Materials science
business.industry Transistor Electrical engineering High voltage Condensed Matter Physics IR-73812 Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials law.invention Safe operating area Impact ionization law Optoelectronics Electrical and Electronic Engineering Current (fluid) Safety Risk Reliability and Quality business Degradation (telecommunications) Communication channel Voltage |
| Zdroj: | Microelectronics reliability, 38(6-8), 1097-1101. Elsevier |
| ISSN: | 0026-2714 |
| Popis: | This paper presents the Hot Carrier Endurance of a High Voltage (100V) self aligned Floating lateral nDMOS transistor. Based on experimental results, a Safe Operating Area is determined according to maximum 10% shift of electrical parameters within 25 years. Process/Device simulation has been done in order to understand the degradation phenomena based on bulk current. Two points of high Impact Ionization rates have been found : one close to the channel junction but in depth, and the second one in the drift region. This later explains the Hot Carrier Degradation of the Ron parameter observed experimentally. |
| Databáze: | OpenAIRE |
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