Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns
| Autor: | Dawei Liu, Jianjing Wang, Bernard H. Stark, Neville McNeill, Simon J. Hollis, Dinesh Pamunuwa, Jeremy J. O. Dalton, Harry C. P. Dymond |
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| Jazyk: | angličtina |
| Rok vydání: | 2017 |
| Předmět: |
arbitrary gate impedance
Materials science Gate dielectric 02 engineering and technology Hardware_PERFORMANCEANDRELIABILITY GaN 0202 electrical engineering electronic engineering information engineering Gate driver Hardware_INTEGRATEDCIRCUITS 0501 psychology and cognitive sciences 050107 human factors Electronic circuit Gate turn-off thyristor Delay calculation gate signal profiling business.industry Buck converter 020208 electrical & electronic engineering 05 social sciences Electrical engineering oscillation active gate driver electromagnetic interference (EMI) Logic gate Ground bounce business |
| Zdroj: | Dymond, H C P, Liu, D, Wang, J, Dalton, J, McNeill, N, Pamunuwa, D, Hollis, S & Stark, B 2017, Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns . in 2016 IEEE Energy Conversion Congress and Exposition (ECCE 2016) : Proceedings of a meeting held 18-22 September 2016, Milwaukee, Wisconsin, USA ., 7855385, Institute of Electrical and Electronics Engineers (IEEE), pp. 5116-5122, 2016 IEEE Energy Conversion Congress and Exposition, ECCE 2016, Milwaukee, United States, 18/09/16 . https://doi.org/10.1109/ECCE.2016.7855385 |
| Popis: | Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8–16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss. |
| Databáze: | OpenAIRE |
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