Testing single via related defectsin digital VLSI designs
| Autor: | Ignazio Cala, Maurizio Ricci, Nunzio Mirabella, Michelangelo Grosso, Roberto Lanza |
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| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: |
Computer science
Code coverage Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 01 natural sciences Design for manufacturing 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Redundancy (engineering) Dependability Electrical and Electronic Engineering Safety Risk Reliability and Quality Reliability Test 010302 applied physics Digital electronics Very-large-scale integration business.industry 020208 electrical & electronic engineering Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Design for manufacturability Computer engineering Defect-oriented testing Single via Design for reliability Electronic design automation Routing (electronic design automation) business |
| Popis: | In integrated circuit designs, the conductive connections between different layers are known as vias or cuts. Such structures are critical for digital circuit manufacturing, as they represent a common defect location. A well-established DfM/DfR rule suggests replicating every via instance for increasing dependability by means of redundancy. When this is not achievable, such as when area and routing layers are limited, and when the circuit is particularly congested, a mandatory requirement is that the remaining single vias must be tested. We propose an automated method for accurately evaluating test coverage of faults related to defective vias, ready for use in any digital implementation flow and for integration within EDA tools, and also providing a useful quality metric. This article extends a previously published paper on this topic [ 2 ], with the introduction of a practical approach relying on both scan-based and functional testing to meet quality requirements in terms of single via defect coverage: functional stimuli complement the automatically-generated scan pattern set to reach the desired target at a limited cost. A prototype tool implementation for single via defect coverage computation is described, and experimental results for two industrial case studies are reported. |
| Databáze: | OpenAIRE |
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