Reliability Characterization of Gallium Nitride MIS-HEMT Based Cascode Devices for Power Electronic Applications
Autor: | Edward Yi Chang, Stone Cheng, Surya Elangovan |
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Jazyk: | angličtina |
Rok vydání: | 2020 |
Předmět: |
electronic trapping effects
Control and Optimization Materials science Transconductance Energy Engineering and Power Technology Gallium nitride 02 engineering and technology High-electron-mobility transistor 01 natural sciences lcsh:Technology Stress (mechanics) chemistry.chemical_compound 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering gallium nitride HEMT cascode configuration off-state gate bias stress device degradation failure mechanisms Engineering (miscellaneous) 010302 applied physics Renewable Energy Sustainability and the Environment business.industry lcsh:T 020208 electrical & electronic engineering Threshold voltage chemistry Rise time Optoelectronics Cascode business Energy (miscellaneous) Degradation (telecommunications) |
Zdroj: | Energies, Vol 13, Iss 2628, p 2628 (2020) Energies; Volume 13; Issue 10; Pages: 2628 |
ISSN: | 1996-1073 |
Popis: | We present a detailed study of dynamic switching instability and static reliability of a Gallium Nitride (GaN) Metal-Insulator-Semiconductor High-Electron-Mobility-Transistor (MIS-HEMT) based cascode switch under off-state (negative bias) Gate bias stress (VGS, OFF). We have investigated drain channel current (IDS, Max) collapse/degradation and turn-on and rise-time (tR) delay, on-state resistance (RDS-ON) and maximum transconductance (Gm, max) degradation and threshold voltage (VTH) shift for pulsed and prolonged off-state gate bias stress VGS, OFF. We have found that as stress voltage magnitude and stress duration increases, similarly IDS, Max and RDS-ON degradation, VTH shift and turn-on/rise time (tR) delay, and Gm, max degradation increases. In a pulsed off-state VGS, OFF stress experiment, the device instabilities and degradation with electron trapping effects are studied through two regimes of stress voltages. Under low stress, VTH shift, IDS collapse, RDS-ON degradation has very minimal changes, which is a result of a recoverable surface state trapping effect. For high-stress voltages, there is an increased and permanent VTH shift and high IDS, Max and RDS-ON degradation in pulsed VGS, Stress and increased rise-time and turn-on delay. In addition to this, a positive VTH shift and Gm, max degradation were observed in prolonged stress experiments for selected high-stress voltages, which is consistent with interface state generation. These findings provide a path to understand the failure mechanisms under room temperature and also to accelerate the developments of emerging GaN cascode technologies. |
Databáze: | OpenAIRE |
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