Analog layout synthesis - Recent advances in topological approaches

Autor:	Graeb, H., Balasa, F., Castro-Lopez, R., Chang, Y. -W, Francisco V. Fernandez, Lin, P. -H, Strasser, M.
Rok vydání:	2009
Zdroj:	Digital.CSIC. Repositorio Institucional del CSIC instname Scopus-Elsevier
DOI:	10.1109/date.2009.5090670
Popis:	Comunicación presentada al "DATE'09" celebrado en Niza del 20 al 24 de Abril de 2009.-- et al. This paper gives an overview of some recent advances in topological approaches to analog layout synthesis and in layout-aware analog sizing. The core issue in these approaches is the modeling of layout constraints for an efficient exploration process. This includes fast checking of constraint compliance, reducing the search space, and quickly relating topological encodings to placements. Sequence-pairs, B*-trees, circuit hierarchy and layout templates are described as advantageous means to tackle these tasks.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::41875ac38b7f0436b047afb51f930c86 https://doi.org/10.1109/date.2009.5090670 Zobrazit plný text záznamu