Neural-Network Decoders for Quantum Error Correction using Surface Codes:A Space Exploration of the Hardware Cost-Performance Trade-Offs
| Autor: | Ramon W. J. Overwater, Masoud Babaie, Fabio Sebastiano |
|---|---|
| Rok vydání: | 2022 |
| Předmět: |
Decoding
fixed-point arithmetic FOS: Physical sciences pareto analysis supervised learning Codes combinational circuits Hardware cryogenic electronics Computer Science (miscellaneous) Electrical and Electronic Engineering surface codes (SCs) Engineering (miscellaneous) quantum-error-correction (QEC) codes Computer Science::Information Theory Quantum Physics Artificial neural networks complementary metal-oxide semiconductor (CMOS) Mechanical Engineering Logic gates Application-specific integrated circuit (ASIC) Quantum computing CMOS integrated circuits Condensed Matter Physics NNs Computer Science Applications error correction codes field programmable gate array (FPGA) machine learning cryo-CMOS decoding Qubit digital integrated circuits feedforward neural networks (NNs) Quantum Physics (quant-ph) Software |
| Zdroj: | IEEE Transactions on Quantum Engineering, 3 |
| ISSN: | 2689-1808 |
| DOI: | 10.48550/arxiv.2202.05741 |
| Popis: | Quantum Error Correction (QEC) is required in quantum computers to mitigate the effect of errors on physical qubits. When adopting a QEC scheme based on surface codes, error decoding is the most computationally expensive task in the classical electronic back-end. Decoders employing neural networks (NN) are well-suited for this task but their hardware implementation has not been presented yet. This work presents a space exploration of fully-connected feed-forward NN decoders for small distance surface codes. The goal is to optimize the neural network for high decoding performance, while keeping a minimalistic hardware implementation. This is needed to meet the tight delay constraints of real-time surface code decoding. We demonstrate that hardware based NN-decoders can achieve high decoding performance comparable to other state-of-the-art decoding algorithms whilst being well below the tight delay requirements $(\approx 440\ \mathrm{ns})$ of current solid-state qubit technologies for both ASIC designs $( 19 pages, 21 figures, 5 papers |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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