| Popis: |
The purpose of this study is to make precise estimations of the amount of power consumed by CMOS VLSI circuits using the application of supervised learning. The proposed model, in contrast to the offered alternatives such as SPICE circuit modeling, does not make any assumptions about the values of any empirical equations or parameters. Rather, these values are taken directly from the data. It does not need the user to have any prior knowledge of the circuit topology or connection in order to deliver trustworthy results, in contrast to other technologies that are currently available. The architecture that has been suggested makes a suggestion for a different interpretation that has a higher level of efficiency, but the execution of this interpretation will require a significant amount of additional data. The power estimation for CMOS VLSI circuits may be improved by utilizing the suggested architecture due to its positive features. This is possible because of the design's versatility. |
