JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding
| Autor: | Charles Buysschaert, Pascal Pellegrin, Tim Bruylants, Gael Rouvroy, Siegfried Foessel, Antonin Descampe, Touradj Ebrahimi, Joachim Keinert, Thomas Richter |
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| Přispěvatelé: | UCL - SSH/ILC/PCOM - Pôle de recherche en communication, Publica |
| Předmět: |
Computer science
Graphics processing unit broadcasting video sensor compression graphics processing units image Electrical and Electronic Engineering image coding Transform coding Lossless compression uncompressed business.industry Video capture streaming media standard computer.file_format JPEG broadcast Uncompressed video real-time systems codecs codec business video compression computer Encoder transform coding Computer hardware Data compression |
| Zdroj: | Proceedings of the IEEE, Vol. 109, no. 9, p. 1559-1577 (September 2021) |
| Popis: | Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight image coding that can be used for mezzanine compression within any AV market. Among the targeted use cases, one can cite video transport over professional video links (serial digital interface (SDI), internet protocol (IP), and Ethernet), real-time video storage, memory buffers, omnidirectional video capture and rendering, and sensor compression (for example, in cameras and the automotive industry). The core coding system is composed of an optional color transform, a wavelet transform, and a novel entropy encoder, processing groups of coefficients by coding their magnitude level and packing the magnitude refinement. Such a design allows for visually transparent quality at moderate compression ratios, scalable end-to-end latency that ranges from less than one line to a maximum of 32 lines of the image, and a low-complexity real-time implementation in application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), central processing unit (CPU), and graphics processing unit (GPU). This article details the key features of this new standard and the profiles and formats that have been defined so far for the various applications. It also gives a technical description of the core coding system. Finally, the latest performance evaluation results of recent implementations of the standard are presented, followed by the current status of the ongoing standardization process and future milestones. |
| Databáze: | OpenAIRE |
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