Connectivity-sensitive algorithm for task placement on a many-core considering faulty regions
| Autor: | Sebastian Schlingmann, Sebastian Weis, Theo Ungerer, Arne Garbade |
|---|---|
| Rok vydání: | 2011 |
| Předmět: |
Very-large-scale integration
Computer science Fault tolerance 02 engineering and technology Parallel computing Chip Network topology 020202 computer hardware & architecture Load management Network on a chip 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Algorithm design Routing (electronic design automation) Algorithm |
| Zdroj: | PDP |
| DOI: | 10.1109/PDP.2011.58 |
| Popis: | Future many-core chips are envisioned to feature up to a thousand cores on a chip. With an increasing number of cores on a chip the problem of distributing load gets more prevalent. Even if a piece of software is designed to exploit parallelism it is not an easy to place parallel tasks on the cores to achieve maximum performance. This paper proposes the connectivity-sensitive algorithm for static task-placement onto a 2D mesh of interconnected cores. The decreased feature sizes of future VLSI chips will increase the number of permanent and transient faults. To accommodate partially faulty hardware the algorithm is designed to allow placement on irregular core structures, in particular, meshes with faulty nodes and links. The quality of the placement is measured by comparing the results to two baseline algorithms in terms of communication efficiency. |
| Databáze: | OpenAIRE |
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