CONCEPT: A Co lum n -Oriented Memory C ontroller for E fficient Memory and P IM Opera t ions in RRAM
| Autor: | Shahar Kvatinsky, Nishil Talati, Heonjae Ha, Ben Perach, Ronny Ronen |
|---|---|
| Jazyk: | angličtina |
| Předmět: |
Random access memory
Hardware_MEMORYSTRUCTURES business.industry Computer science 02 engineering and technology Memory controller 020202 computer hardware & architecture Resistive random-access memory symbols.namesake Memory management Hardware and Architecture Embedded system Scalability 0202 electrical engineering electronic engineering information engineering symbols Node (circuits) Electrical and Electronic Engineering business Software Dram Von Neumann architecture |
| Zdroj: | IEEE Micro |
| ISSN: | 1937-4143 0272-1732 |
| DOI: | 10.1109/mm.2018.2890033 |
| Popis: | While DRAM cannot easily scale below a 20-nm technology node, RRAM suffers far less from scalability issues. Moreover, RRAM's resistivity enables its use for processing-in-memory (PIM), potentially alleviating the von Neumann bottleneck. Unfortunately, because of technological idiosyncrasies, existing DRAM-centric memory controllers cannot exploit the full potential of resistive RAM (RRAM). In this paper, we present the design of a memory controller called CONCEPT. The controller is optimized to exploit unique properties of RRAM to enhance its performance and energy efficiency as well as exploiting RRAM's PIM capability. We show that with CONCEPT, RRAM can achieve DRAM-like performance and energy efficiency on SPEC CPU 2006 benchmarks. Furthermore, using RRAM PIM capabilities, we show a 5× performance gain on a data-intensive in-memory database workload compared to a state-of-the-art CPU-memory computing model. |
| Databáze: | OpenAIRE |
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