| Popis: |
The applications in micro-chips include damascene Cu metallization [1], CoWP capping layer for Cu [2], Ni/Au [3], or Ni/Pd metal deposition on a bond pad. This article discusses electroless (EL) Ni deposition for high aspect ratio sub-micron vias. Typically, via metallization is done by CVD Ti/TiN/W deposition followed by CMP. Some of the inherent issues with this approach include seam, void, and high cost due to multiple steps, and voids in vias pose reliability concerns. Electroless (EL) Ni was evaluated for such vias to deposit bottom-up fill, which does not require seed layer film. Traditional EL Ni process sequences are usually composed of pre-clean, activation, and EL deposition. Activation is used to deposit catalyst selectively on the desired substrate becuase EL Ni requires a catalyst to start the nucleation. |
