Eliminating speed penalty in ECC protected memories
| Autor: | Michael Nicolaidis, Thierry Bonnoit, Nacer-Eddine Zergainoh |
|---|---|
| Přispěvatelé: | Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Torella, Lucie |
| Rok vydání: | 2011 |
| Předmět: |
010302 applied physics
Engineering Orthogonal frequency-division multiplexing business.industry [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics 02 engineering and technology integrated circuit reliability 01 natural sciences 020202 computer hardware & architecture Reduction (complexity) Reliability (semiconductor) EMI PACS 85.42 Encoding (memory) 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electronic engineering [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics business Low voltage Decoding methods error-correcting-code Electronic circuit |
| Zdroj: | DATE Proc. of Design Automation and Test in Europe Conference (DATE'11) Design Automation and Test in Europe Conference (DATE'11) Design Automation and Test in Europe Conference (DATE'11), Mar 2011, Grenoble, France. pp.1-6 Scopus-Elsevier |
| Popis: | ISBN 978-1-61284-208-0; International audience; Drastic device shrinking, power supply reduction, increasing complexity and increasing operating speeds that accompanying technology scaling have reduced the reliability of nowadays ICs. The reliability of embedded memories is affected by particle strikes (soft errors), very low voltage operating modes, PVT variability, EMI and accelerated circuit aging. Error correcting codes (ECC) is an efficient mean for protecting memories against failures. A major issue with ECC is the speed penalty induced by the encoding and decoding circuits. In this paper we present an effective approach for eliminating this penalty and we demonstrate its efficiency in the case of an advanced reconfigurable OFDM modulator). |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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