Evaluating the Impact of Optical Interconnects on a Multi-Chip Machine-Learning Architecture
| Autor: | Yu-Hwan Ro, Eojin Lee, Jung Ho Ahn |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
accelerator
Computer Networks and Communications Computer science optical interconnect multi-chip architecture lcsh:TK7800-8360 02 engineering and technology Machine learning computer.software_genre Convolutional neural network 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering Architecture cluster Artificial neural network business.industry lcsh:Electronics 020208 electrical & electronic engineering Optical interconnect Chip Convolutional Neural Network (CNN) 020202 computer hardware & architecture machine learning Hardware and Architecture Control and Systems Engineering Signal Processing Artificial intelligence business computer |
| Zdroj: | Electronics Volume 7 Issue 8 Electronics, Vol 7, Iss 8, p 130 (2018) |
| ISSN: | 2079-9292 |
| Popis: | Following trends that emphasize neural networks for machine learning, many studies regarding computing systems have focused on accelerating deep neural networks. These studies often propose utilizing the accelerator specialized in a neural network and the cluster architecture composed of interconnected accelerator chips. We observed that inter-accelerator communication within a cluster has a significant impact on the training time of the neural network. In this paper, we show the advantages of optical interconnects for multi-chip machine-learning architecture by demonstrating performance improvements through replacing electrical interconnects with optical ones in an existing multi-chip system. We propose to use highly practical optical interconnect implementation and devise an arithmetic performance model to fairly assess the impact of optical interconnects on a machine-learning accelerator platform. In our evaluation of nine Convolutional Neural Networks with various input sizes, 100 and 400 Gbps optical interconnects reduce the training time by an average of 20.6% and 35.6%, respectively, compared to the baseline system with 25.6 Gbps electrical ones. |
| Databáze: | OpenAIRE |
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