Hot carrier injection and negative bias temperature instability induced NMOS and PMOS degradation on CMOS Ring Oscillator
| Autor: | Patrick Martin, Guy Imbert, Mohamed Aziz Doukkali, Insaf Lahbib |
|---|---|
| Přispěvatelé: | Laboratoire de cristallographie et sciences des matériaux (CRISMAT), Université de Caen Normandie (UNICAEN), Normandie Université (NU)-Normandie Université (NU)-École Nationale Supérieure d'Ingénieurs de Caen (ENSICAEN), Normandie Université (NU)-Institut de Chimie du CNRS (INC)-Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche sur les Matériaux Avancés (IRMA), Normandie Université (NU)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université de Rouen Normandie (UNIROUEN), Normandie Université (NU)-Institut national des sciences appliquées Rouen Normandie (INSA Rouen Normandie), Institut National des Sciences Appliquées (INSA)-Normandie Université (NU)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université de Rouen Normandie (UNIROUEN), Institut National des Sciences Appliquées (INSA)-Normandie Université (NU)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS), NXP Semiconductors [France], École Nationale Supérieure d'Ingénieurs de Caen (ENSICAEN), Normandie Université (NU)-Normandie Université (NU)-Centre National de la Recherche Scientifique (CNRS)-Université de Caen Normandie (UNICAEN), Normandie Université (NU)-Institut de Chimie du CNRS (INC) |
| Jazyk: | angličtina |
| Rok vydání: | 2016 |
| Předmět: |
Materials science
Threshold voltage Negative bias temperature instability PMOS degradation NAND gate Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Ring oscillator Stress Transistors 01 natural sciences PMOS logic Hot carriers Degradation MOSFET Reliability simulation Mathematical model 0103 physical sciences Hardware_INTEGRATEDCIRCUITS [CHIM.CRIS]Chemical Sciences/Cristallography [CHIM]Chemical Sciences Oscillators NMOS logic Ring oscillator frequency degradation Hot-carrier injection 010302 applied physics Integrated circuit reliability Negative-bias temperature instability business.industry NMOS degradation Electrical engineering [CHIM.MATE]Chemical Sciences/Material chemistry 021001 nanoscience & nanotechnology CMOS integrated circuits [CHIM.THEO]Chemical Sciences/Theoretical and/or physical chemistry CMOS Hot Carrier Circuit-level reliability simulator 0210 nano-technology business Hardware_LOGICDESIGN |
| Zdroj: | 2016 Annual Reliability and Maintainability Symposium (RAMS) 2016 Annual Reliability and Maintainability Symposium (RAMS), Jan 2016, Tucson, United States. pp.7448024, ⟨10.1109/RAMS.2016.7448024⟩ 2016 Annual Reliability and Maintainability Symposium (RAMS), 2016, Tucson, United States. pp.7448024, ⟨10.1109/RAMS.2016.7448024⟩ |
| Popis: | International audience; Reliability simulation is an area of increasing interest as it allows the design of circuits that are both reliable and optimized for circuit performance by transient device degradation calculations. In this paper, Hot Carrier (HC) injection mechanism and Negative Bias Temperature Instability (NBTI) effects on the performance of respectively n-channel and p-channel transistors of a 0.25μ CMOS technology are investigated using a new reliability simulation tool. Predicted degradation results are compared with HC and NBTI degradation models, developed on the bases of accelerated aging tests, in order to confirm simulator accuracy. The study concluded that after 10 years of operation, NMOS transistors present an increase of approximately 0.55V in linear threshold voltage and about 0.45V in saturation threshold voltage. Whereas, the linear and the saturation threshold voltages of PMOS transistors increase of only 38mV. Therefore, we can assert that HC degradation mechanism has more impact on NMOS than NBTI on PMOS transistors. Our study of reliability is extended to circuits' degradation to raise awareness of the circuit-level reliability simulator interest. Indeed, the degradation, caused by HC and NBTI, of a Ring Oscillator (RO), which designed with 40 serial OR delay gate looped on a NAND input, is presented in this paper. The effect of each mechanism on the frequency degradation is dissected. The study concluded that the increasing of the threshold voltage of both NMOS and PMOS transistors, under respectively HC and NBTI stress, increases the propagation delay of every RO stage. © 2016 IEEE. |
| Databáze: | OpenAIRE |
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