Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors

Autor: Liqiong Wei, Shekhar Borkar, Tanay Karnik, Yibin Ye, Steven M. Burns, V. Govindarajulu, Vivek De, James W. Tschanz
Rok vydání: 2002
Předmět:
Zdroj: DAC
DOI: 10.1109/dac.2002.1012674
Popis: We describe various design automation solutions for design migration to a dual-Vt process technology. We include the results of a Lagrangian relaxation based tool, iSTATS, and a heuristic iterative optimization flow. Joint dual-Vt allocation and sizing reduces total power by 10+% compared with Vt allocation alone, and by 25+% compared with pure sizing methods. The heuristic flow requires 5/spl times/ larger computation runtime than iSTATS due to its iterative nature.
Databáze: OpenAIRE