AD-PLL for WiMAX with Digitally-Regulated TDC and Glitch Correction Logic
| Autor: | Salvatore Levantino, Carlo Samori, Davide Tasca, Paolo Madoglio, Marco Zanuso, Andrea L. Lacaita |
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| Rok vydání: | 2010 |
| Předmět: |
General Computer Science
Noise (signal processing) Computer science lcsh:Electronics Bandwidth (signal processing) Real-time computing Skew lcsh:TK7800-8360 Hardware_PERFORMANCEANDRELIABILITY WiMAX Phase detector Glitch Phase-locked loop Control and Systems Engineering Phase noise Hardware_INTEGRATEDCIRCUITS Electronic engineering Computer Science(all) Hardware_LOGICDESIGN |
| Zdroj: | EURASIP Journal on Embedded Systems, Vol 2010, Iss 1, p 175764 (2010) EURASIP Journal on Embedded Systems, Vol 2010 (2010) |
| ISSN: | 1687-3963 1687-3955 |
| DOI: | 10.1155/2010/175764 |
| Popis: | This paper describes the design of an All-Digital Phase Locked Loop (AD-PLL) for wireless applications in the WiMAX 3.3–3.8 GHz bandwidth. The time/digital converter (TDC) sets the in-band noise and it may be responsible for the presence of spurious tones at the PLL output. The TDC is implemented as a delay-locked loop (DLL) to be insensitive to process spreads and it uses a lead-lag phase detector and a digital loop filter to further take advantage of the digital approach. The most important source of spurs is identified in the time skew between counter and TDC in the PLL. This mechanism gives rise to a glitch in the digital feedback signal and spurs in the output spectrum. A simple glitch-corrector logic is described, that completely removes this effect, thus allowing to meet the phase noise specifications. The AD-PLL has been designed in a 90 nm CMOS process. |
| Databáze: | OpenAIRE |
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