A reconfigurable integrated circuit for high performance computer arithmetic
| Autor: | S.F. Quigley, N. L. Miller |
|---|---|
| Rok vydání: | 2002 |
| Předmět: |
business.industry
Computer science Integrated circuit Reconfigurable computing law.invention Programmable logic device Arithmetic logic unit Computer architecture law Arbitrary-precision arithmetic Saturation arithmetic Hardware_ARITHMETICANDLOGICSTRUCTURES Arithmetic Field-programmable gate array business Digital signal processing AND gate |
| Zdroj: | ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187). |
| Popis: | In this paper, we present the design of a novel Field Programmable Gate Array (FPGA) which contains the necessary logic elements to support high performance computer arithmetic. The FPGA contains a routing framework and logic cell structure that is suitable for implementing digital systems for computer arithmetic, image processing, digital signal processing and similar computationally intensive applications. The proposed architecture is flexible, reconfigurable and will support operands of various sizes for fixed point parallel and serial binary computations. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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