Why Systems-on-Chip needs More UML like a Hole in the Head
| Autor: | John R. Wolfe, Stephen J. Mellor, Campbell Mccausland |
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| Přispěvatelé: | Accelerated Technologies [Tucson], Mentor Graphics, EDAA - European design and Automation Association |
| Rok vydání: | 2006 |
| Předmět: |
Hardware architecture
UML tool [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR] FOS: Computer and information sciences Finite-state machine business.industry Modeling language Computer science Programming language Applications of UML computer.software_genre [SPI.TRON]Engineering Sciences [physics]/Electronics Unified Modeling Language Embedded system Hardware Architecture (cs.AR) System on a chip Computer Science - Hardware Architecture business computer Object Constraint Language computer.programming_language |
| Zdroj: | UML for SOC Design ISBN: 0387257446 Design, Automation and Test in Europe DATE'05 DATE'05, Mar 2005, Munich, Germany. pp.834-835 DATE |
| DOI: | 10.1007/0-387-25745-4_2 |
| Popis: | Let's be clear from the outset: SoC can most certainly make use of UML; SoC just doesn't need more UML, or even all of it. The advent of model mappings, coupled with marks that indicate which mapping rule to apply, enable a major simplification of the use of UML in SoC. Comment: Submitted on behalf of EDAA (http://www.edaa.com/) |
| Databáze: | OpenAIRE |
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