Comparative experimental study of junctionless and inversion-mode nanowire transistors for analog applications
| Autor: | Benoit Sklenard, Joris Lacord, D. Lattard, R. Nait Youcef, Xavier Garros, A. Tataridou, Francois Andrieu, Claire Fenouillet-Beranger, F. Balestra, Sylvain Barraud, Perrine Batude, G. Audoit, Mikael Casse, D. Bosch, J. Lugo, Christoforos G. Theodorou, Laurent Brunet, J.-P. Colinge, J. Cluzel, F. Allain, C. Vizioz, J.M. Hartmann |
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| Přispěvatelé: | Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA) |
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
Materials science
Channel length modulation business.industry Doping Transistor Nanowire Silicon on insulator law.invention [SPI.TRON]Engineering Sciences [physics]/Electronics Monocrystalline silicon law Logic gate MOSFET Optoelectronics [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics business |
| Zdroj: | 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Aug 2020, Hsinchu, Taiwan. pp.126-127, ⟨10.1109/VLSI-TSA48913.2020.9203690⟩ |
| Popis: | We fabricated junction less and inversion-mode monocrystalline nanowire nMOSFETs down to L=18nm gate length and W=20nm width. We demonstrate record performance of nanowire junction less transistors for analog applications: $A_{VT}=1.4mV \cdot \mu$ m matching, $A_{v0}=62dB$ gain (L=200nm), $f_{T}=126GHz$ cut-off frequency and $f_{MAX}=182GHz$ maximum operating frequency (L=35nm). Junction Less transistor performances even exceed those of inversion-mode ones in terms of back-bias capability, low-frequency noise, hotcarrier degradation and fMAX. This is explained by junction less physics: channel length modulation, bulk conduction and high channel-depth sensitivity to back bias. |
| Databáze: | OpenAIRE |
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