Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
| Autor: | Geon-Beom Lee, Myungsoo Seo, Yang-Kyu Choi, Joon-Kyu Han, Seong-Joo Han, Il-Woong Tcho, Ji-Man Yu, Myung-Su Kim, Gyeong-Jun Yun |
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| Rok vydání: | 2021 |
| Předmět: |
Materials science
Circuit performance Science 02 engineering and technology 01 natural sciences Article Nanoscience and technology 0103 physical sciences MOSFET 010302 applied physics Multidisciplinary business.industry 021001 nanoscience & nanotechnology Nanoscale devices Medicine Optoelectronics Double gate Thermoluminescent dosimeter 0210 nano-technology business Ternary operation Realization (systems) Mixed radix Voltage |
| Zdroj: | Scientific Reports, Vol 11, Iss 1, Pp 1-10 (2021) Scientific Reports |
| ISSN: | 2045-2322 |
| DOI: | 10.1038/s41598-021-92378-7 |
| Popis: | A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate (ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system (MRS). The TLD is essential component for realization of the MRS. The ICDG Si-NW MOSFET resolves the limitations of the conventional multi-threshold voltage (multi-Vth) schemes required for the TLD. The ICDG Si-NW MOSFETs were fabricated and characterized. Afterwards, their electrical characteristics were modeled and fitted semi-empirically with the aid of SILVACO ATLAS TCAD simulator. The circuit performance and power consumption of the TLD were analyzed using ATLAS mixed-mode TCAD simulations. The TLD showed a power-delay product of 35 aJ for a gate length (LG) of 500 nm and that of 0.16 aJ for LG of 14 nm. Thanks to its inherent CMOS-compatibility and scalability, the TLD based on the ICDG Si-NW MOSFETs would be a promising candidate for a MRS using ternary and binary logic. |
| Databáze: | OpenAIRE |
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