Delay defect screening for a 2.16GHz SPARC64 microprocessor

Autor: Takahisa Hiraide, Akira Kanuma, Tsuyoshi Mochizuki, Masahiro Yanagida, Shigeru Nagasawa, Chihiro Endoh, Yutaka Isoda, Yaroku Sugiyama, Takeshi Kono, Osamu Sugawara, Hitoshi Yamanaka, Kazunobu Adachi, Noriyuki Ito, Eizo Ninoi, Daisuke Maruyama
Rok vydání: 2006
Předmět:
Zdroj: ASP-DAC
Popis: This paper present a case-study of delay defect screening applied to Fujitsu 2.16GHz SPARC64 microprocessor. A nonrobust delay test is used while each test vector is compacted to detect multiple transition faults in a standard scan-based design targeting a stuck-at fault test. Our test technique applied to a microprocessor designed with 6M gate logic, 4MB level 2 cache, and 239K latches, achieves 90% coverage using 3,103 test vectors. We estimate the distribution of the delay of paths covered by our delay test. We also show the effectiveness of our method by discussing the correlation between the screening result and the actual number of delay defects.
Databáze: OpenAIRE