Hybrid-Phase-Transition FET Devices for Logic Computation
| Autor: | Juan Núñez, Maria J. Avedillo, Manuel Jimenez |
|---|---|
| Přispěvatelé: | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo, Ministerio de Economía y Competitividad (MINECO). España, European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER) |
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
lcsh:Computer engineering. Computer hardware
Computer science Phase transition devices steep-slope devices lcsh:TK7885-7895 Hardware_PERFORMANCEANDRELIABILITY 01 natural sciences law.invention Device-circuit codesign 03 medical and health sciences law phase transition devices 0103 physical sciences Low power Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering Steep-slope devices Standby power 030304 developmental biology Electronic circuit 010302 applied physics 0303 health sciences low power Transistor Hybrid-phase-transition FET (HyperFET) Electronic Optical and Magnetic Materials Threshold voltage Power (physics) hybrid-phase-transition FET (HyperFET) Terminal (electronics) Hardware and Architecture Logic gate Energy (signal processing) Hardware_LOGICDESIGN |
| Zdroj: | Digital.CSIC. Repositorio Institucional del CSIC instname IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 6, Iss 1, Pp 1-8 (2020) |
| Popis: | Hybrid-phase-transition FETs (HyperFETs), built by connecting a phase transition material (PTM) to the source terminal of a FET, are able to increase the ON-to- OFF current ratio. In this article, we describe a comprehensive study carried out to explore the potential of these devices for low-power and energy-limited logic applications. HyperFETs with different ON-OFF current tradeoffs are evaluated at the circuit level. The results show limited improvement over conventional transistors in terms of power and energy. However, based on this analysis, this article proposes different design techniques to overcome the drawbacks identified in the study and thereby make better use of HyperFETs. Hybrid circuits, using both FinFETs and HyperFETs, and circuits combining different HyperFET devices are introduced and evaluated. At some frequencies, reductions of over 40% were obtained with respect to FinFET-only implementations, while minimum energy per operation values were obtained, which were lower than those achieved with low standby power (LSTP) FinFETs and high-performance (HP) FinFETs. This article also evaluates the impact of PTM transition time on the power performance of HyperFET circuits. Ministerio de Economía y Competitividad, FEDER TEC2017-87052-P |
| Databáze: | OpenAIRE |
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