Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization With Fault Tolerance

Autor: Valentina Ciriani, Elena Ioana Vatajelu, Dan Alexandrescu, Luca Frontini, Mircea R. Stan, Muhammed Ceylan Morgul, Onur Tunali, Mustafa Altun, Csaba Andras Moritz, Lorena Anghel
Přispěvatelé: Istanbul Technical University (ITÜ), Università degli Studi di Milano = University of Milan (UNIMI), SPINtronique et TEchnologie des Composants (SPINTEC), Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Architectures and Methods for Resilient Systems (TIMA-AMfoRS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), University of Massachusetts [Amherst] (UMass Amherst), University of Massachusetts System (UMASS), University of Virginia, iROc Technologies (IROC TECHNOLOGIES), Cadence Connection-EDA Consortium-FSA-Cubic Micro, Università degli Studi di Milano [Milano] (UNIMI), Architectures and Methods for Resilient Systems (AMfoRS ), University of Virginia [Charlottesville]
Rok vydání: 2021
Předmět:
Zdroj: IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology, 2020, pp.39-53. ⟨10.1109/TNANO.2020.3044017⟩
IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, 2020, pp.39-53. ⟨10.1109/TNANO.2020.3044017⟩
ISSN: 1941-0085
1536-125X
Popis: Nano-crossbar arrays have emerged to achieve high performance computing beyond the limits of current CMOS with the drawback of higher fault rates. They offer area and power efficiency in terms of their easy-to-fabricate and dense physical structures. They consist of regularly placed crosspoints as computing elements, which behave as diode, memristor, field effect transistor, or novel four-terminal switching devices. In this study, we establish a complete design framework for crossbar circuits explaining and analyzing every step of the process. We comparatively elaborate on these technologies in the sense of their capabilities for computation regarding area including a new logic synthesis technique for memristors, fault tolerance including a novel paradigm for four-terminal devices, delay, and power consumption. As a result, this study introduces a synthesis methodology that considers basic technology preference for switching crosspoints and fault rates of the given crossbar as well as their effects on performance metrics including power, delay, and area.
Databáze: OpenAIRE